1. Field of the Invention
The present invention is related to data processing systems and more specifically, to an in-circuit emulator for qualifying events based upon whether or not a processor was in or out of a particular processor mode at the time of recordation of the event.
2. Prior Art
The Intel 386SL is a microprocessor that is used in notebook computers. A notebook computer is a small, lightweight, portable, battery-powered, lap-top personal computer (PC) that uses a thin, lightweight, display screen such as a liquid crystal display (LCD). Notebook PCs typically run several hours on rechargeable batteries, weigh 4-7 pounds, fold up, and can be carried like a briefcase. In order to conserve power and prolong battery energy, the 386SL has a feature known as system management mode (SMM) wherein power to devices, such as disk drives, is shut down for periods of time when they are not in use. When the 386SL is operating in SMM mode, user code is executed from a different physical address space than the address space from which normal code is executed.
An in-circuit emulator (ICE) duplicates and imitates the behavior of a chip it emulates by using programming techniques and special machine features to permit the ICE to execute micro code written for the chip that it imitates.
An emulation processor operates in two execution modes, emulation mode and interrogation mode. Emulation mode is the mode of the emulator which includes real-time event evaluation. Interrogation mode is an interrupt service environment of the emulator. A monitor (ICE code) that is emulation of processor code executed during interrogation mode is provided. A break occurs to exit emulation mode to enter interrogation mode and thus invoke the monitor.
Before user code (instructions written in a particular language) can be decoded by a micro processor, the user code must be translated by an assembler into a series of operation codes (op codes) that the micro processor can understand. An op code is a numeric value, decoded by the micro processor, that instructs the micro processor to perform a specific operation. Emulation software attempts to disassemble op codes to reconstruct the original user code.
Since code executed in SMM mode maps to a different address space, if a user wants to examine that code via the emulator interrogation mode facility, the SMM address space must be opened up, examined and then closed. During emulation mode, trace information is collected in a trace buffer. The trace information does not include every line of code, but to save space only records boundary conditions such as branch instructions. In interrogation mode the boundary condition instructions in the trace buffer are used to reconstruct the original code by generating addresses to user memory. Since the events recorded while in SMM mode refer to a different address space than events recorded in normal mode, the calculated addresses for SMM events will not be correct. In the past the emulation software assumed that any invalid op codes that were found were op codes corresponding to SMM events. The software then tired to reconstruct the user code generated while in SMM mode by invoking special code sequences. This prior technique is not always successful and involves a high overhead penalty.
It is therefore an object of the present invention to provide a method and apparatus for determining what mode a processor is in at the time of event recordation in a trace memory so that a correct address to physical memory is calculated when trace memory is processed to ensure that the events recorded disassemble the correct address space.